1. Field of the Invention
The present invention relates to a high-order ΔΣ modulator used in a ΔΣ analog/digital converter.
2. Description of the Related Art
An analog/digital converter is classified as a Nyquist rate analog/digital converter or an oversample analog/digital converter. An oversample analog/digital converter, especially, a ΔΣ analog/digital converter, is easy to realize high accuracy and small in circuit scale, and often used in measurement applications whose signal band is relatively narrow.
The ΔΣ analog/digital converter is constructed from: a ΔΣ modulator including plural stages of amplifying integrators which amplify and integrate a differential signal between an input analog signal and a prescribed feedback analog signal, a quantizer which digitizes the output of each amplifying integrator to obtain a digital value, and a digital/analog converter which generates a feedback analog signal from the digital value; and a digital filter including a decimation filter or the like which calculates a final analog/digital conversion value from a sequence of digital values provided from the ΔΣ modulator. Since the ΔΣ analog/digital converter depends on the configuration of the ΔΣ modulator in terms of accuracy, the amplifying integrators are connected in series in plural stages in order to realize high accuracy.
However, there has been a demand for the recent ΔΣ modulator to have reduced circuit size and less current consumption while having high accuracy.
FIG. 4 is a block diagram illustrating a second-order ΔΣ modulator 600 of related art.
The ΔΣ modulator 600 of related art includes an amplifying integrator 61 constructed from a first-stage differential amplifying integrator 611 and a second-stage amplifying integrator 612 both supplied with an input signal Vin, a quantizer 62 which outputs a digital signal Dout, and a digital/analog converter 63 which converts the digital signal Dout into an analog signal.
The first-stage differential amplifying integrator 611 includes an amplifier which amplifies the input signal Vin (multiplied by b), an amplifier which amplifies the analog signal (multiplied by −b), an addition circuit which adds output signals of the two amplifiers, and an integrator which integrates the output of the addition circuit.
The second-stage amplifying integrator 612 includes an amplifier which amplifies the output of the first-stage differential amplifying integrator 611 (multiplies it by c1), and an integrator which integrates the output of the amplifier. The integrator includes a delay-free integrator.
The quantizer 62 includes an adder which adds the input signal Vin, an amplified signal (multiplied by a1) obtained by amplifying the output of the first-stage differential amplifying integrator 611, and an amplified signal (multiplied by a2) obtained by amplifying the output of the second-stage amplifying integrator 612, and a comparator which compares the so-added signal and a prescribed reference voltage.
FIG. 5 is a circuit diagram illustrating the related art ΔΣ modulator 600. The ΔΣ modulator 600 defines the input signal as differential signals (Vin+, Vin−) to output a digital signal Dout (XDout). Further, the differential amplifying integrator 611 and the amplifying integrator 612 are constructed by a switched capacitor amplifier capable of realizing an amplifying function and an integrating function integrally. Then, the switched capacitor amplifier which configures the differential amplifying integrator 611 and the amplifying integrator 612 is constructed to switch and share an amplifier 613 by a switch circuit since the differential amplifying integrator 611 and the amplifying integrator 612 are operated in modes opposite to each other.
With the above configuration, the related art ΔΣ modulator 600 is made small in circuit scale and reduced in current consumption while being high in accuracy (refer to Japanese Patent Application Laid-Open No. 2016-184792).